The Cray T3D is an MPP (no shared memory) computer with a current theoretical peak of 300 billion floating point operations per second, or 300 gigaflops with 2048 processors. The T3D is an MIMD (multiple instruction, multiple data) machine. The number of processing elements (PE's) can be anywhere from 32 to 2048. Each element on the T3D is a DEC 21064 (EV-4) RISC chip with its own memory, memory controller, and prefetch queue. A single node on the T3D consists of two PE's combined with a network switch.
The nodes on the Cray T3D are connected in a 3-D torus configuration. The connecting network operates at a speed of 150 Mhz, with bidirectional transfers and separate routing for data and communication information. The bandwidth for a 2048-processor T3D is approximately 154 gigabytes per second.
The DEC 21064 Alpha chip runs at a speed of 150 MHz, with a theoretical peak performance level of 150 megaflops. From a practical standpoint, the sustained performance of an individual PE on user code is around 40 megaflops. Each PE can support either two or eight megabytes of memory. There are also redundant PE's on the T3D, which will start running in case some of the primary PE's fail. The DEC Alpha chip contains a floating point execution unit with 32 64-bit registers, an integer execution unit also with 32 64-bit registers, a 128-bit bidirectional bus, and both instruction and data caches (8 Kbytes each).
The T3D processors are dynamically divided into partitions which appear to the user as logically separate dedicated machines, allowing multiple users to share the T3D. The number of processors allocated in a partition must be a power of 2. T3D jobs are initiated on the host system and may be run interactively or using batch queues. To run a T3D job, the host runs a process called mppexec which spawns an agent process on the host for each PE in the partition and then loads the T3D executables. These agents provide the control and I/O interface for the T3D through the frontend host.
Back to the Home Page